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Fix SBE Market Data Decoder on FPGA
HPC
FPGA
RTL
UVM
FinTech
The ACCELR team has hands on experience in building hardware accelerated high performance computing systems for the FinTech market. Our FPGA powered marked data decoder is capable of decoding FIX SBE market data decoder messages. System has been tested on B3 market data and can provide a high throughput filtered full depth incremental feed to any software component running on an AWS F1 server. Talk to our team for more information on our FinTech and FPGA experience.
FPGA accelerated SBE decoding
The decoder is capable of decoding Fix SBE messages from the B3 UMDF feed.
High throughput feed to software components
The entire real-time SBE feed decoding process is offloaded to FPGA which is capable of providing a filtered feed to software components.
Functional verification on UVM test-bench
Full functional verification of RTL components using a UVM test-bench.
